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 U4084B
Low-Voltage, Voice-Switched Circuit for Hands-Free Operation
Description
The low-voltage, voice-switched speakerphone circuit U4084B incorporates the features listed below. The versatility of the device is further enhanced by giving access to internal circuit points. The block diagram shows amplifiers, level detectors, transmit and receive attenuators operating in complementary functions, back ground noise monitors, chip disable, dial tone detector and mute function etc. Due to low-voltage operation, it can be operated either by low supply voltage or via a telephone line requiring 4.0 mA typ. Further features are stand-alone operation via a coupling transformer (Tip and Ring) or in conjunction with a handset speech network, as shown in figure 2.
Features
D Low-voltage operation: 3.0 to 6.5 V D Attenuator gain range between D D D D D D D D
transmit and receive: 52 dB Four-point signal sensing for improved sensitivity Monitoring system for background-noise level Microphone-amplifier gain adjustable Mute function Chip disable for active/ standby operation Dial tone detector Compatible with the speaker amplifier U4083B Case: DIP24 or SO24
Benefits
D Fast channel switching enables quasi duplex
operation
D Low current consumption for high output volume D Optimized U3800BM interface
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
Block Diagram
MIC 8 - VB MUTE 9 13 CPT T attenuator + VS Backgroundnoise monitor AGC 24 Backgroundnoise monitor 20 15 TLO2 16 RLO2 VS 4 Dial tone detector + - Level detectors Attenuator control Level detectors 22 22 CPR MICO TLI2 7 14 TI 6 TO 5
TLI1 RLO1 TLO1
1 GND 3 CD 12 VB 11 CT 17 RLI2 400 VB R attenuator 19 RECO 18 10
U4084B
23 RLI1
12626
RI VCI
Figure 1. Block diagram
2 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
0.02m F 0.2m F 270pF Output 20dB TO 5 T attenuator VS AGC Backgroundnoise monitor 20 TLI1 Level detectors Attenuator control Level detectors 22 RLO1 22 Dial tone detector + - TLO1 24 CPR Backgroundnoise monitor 15mF 300k W 0.1mF VS 5.1k W 2 mF 2 mF 180k W 5.1k W TLI2 TI 6 7 - VB + MUTE 9 300k W CPT 13 15m F TLO2 15 RLO2 16 VS 4 14 0.1 mF MIC MICO 8 620 W VB 20 mF 1kW
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
5.1k W 0.1m F 0.1m F 2 mF 2 mF 1000 mF GND 1 VB 5.1V CD 3 400 W 12 220 mF 120kW 5 mF VB CT RLI2 0.05 mF 5.1kW 6 + - 8 1 3 110k W 11 17 R attenuator 19 RECO 0.1 mF 10kW 0.1 mF 200pF 0.05 mF 20kW Volume control 9.1k W + - 4 18 RI 10 VCI
VS
U4084B
23 RLI1
Figure 2. Block diagram with external circuit
Preliminary Information
U4083B
7 5
1N4733
10kW Input
12625
U4084B
3 (26)
U4084B
Pin Description
Pin 1 2 3 Symbol GND NC CD Ground Not connected Chip disable. A logic LOW (< 0.8 V) sets normal operation. A logic HIGH (> 2.0 V) disables the IC to conserve power. The input impedance is nominally 90 kW. Supply voltage 2.8 to 6.5 V, approximately @ 4 mA. The AGC circuit reduces the receive attenuator gain @ 25 dB. Receive mode @ 2.8 V. Transmit attenuator output. The DC level is approximately VB. Transmit attenuator input. Max. signal level is 350 mVrms. The input impedance is approximately 10 kW. Microphone amplifier output. The gain is set by external resistors. Microphone amplifier input. The bias voltage is approximately VB. Mute input. A logic LOW (< 0.8 V) sets normal operation. A logic HIGH (> 2.0 V) mutes the microphone amplifier without affecting the rest of the circuit. The input impedance is nominally 90 kW. Volume control input. When VCI = VB, the receive attenuator is at maximum gain in the receive mode. When VCI = 0.3 VB, the receive gain is 35 dB lower. This does not affect the transmit mode. 19 20 21 22 RECO TLI1 TLO1 RLO1 16 17 18 RLO2 RLI2 RI 12 VB Function Pin 11 Symbol CT Function Response time. An RC at this pin sets the response time for the circuit to switch modes. Output voltage VS/2. It is a system AC ground, and biases the volume control. A filter cap is required. An RC at this pin sets the time constant for the transmit background monitor. Transmit-level detector input on the microphone/ speaker side. Transmit-level detector output on the microphone/ speaker side, and input to the transmit background monitor. Receive-level detector output on the microphone/ speaker side Receive-level detector input on the microphone/ speaker side Input receive attenuator and dialtone detector. The max. input level is 350 mVrms. The input impedance is approximately 10 kW. Receive attenuator output. DC level is approximately VB. Transmit-level detector input on the line side Transmit-level detector output on the line side Receive-level detector output on the line side, and input to the receive background monitor Receive-level detector input on the line side An RC at this pin sets the time constant for the receive background monitor
13
CPT
4
VS
14 15
TLI2 TLO2
5 6
TO TI
7 8
MICO MIC
9
MUTE
10
VCI
23 24
RLI1 CPR
4 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
Absolute Maximum Ratings
Reference point Pin 1, Tamb = 25C, unless otherwise specified. Parameters Supply voltage Voltages Pin 4 Pins 3 and 9 Pin 10 Pins 6 and 18 Symbol VS Value -1.0 to +7.0 -1.0 to (VS + 1.0) -1.0 to (VS + 0.5) -0.5 to (VS + 0.5) -55 to +150 125 -20 to +60 650 520 Unit V V C C C mW
Storage temperature range Junction temperature Ambient temperature range Power dissipation Tamb = 60C
Tstg Tj Tamb DIP24 SO24 Ptot Ptot
Maximum Thermal Resistance
Parameters Junction ambient DIP24 SO24 Symbol RthJA RthJA Value 100 120 Unit K/W K/W
Operation Recommendation
Parameters Supply voltage CD input MUTE input Output current Volume control input Attenuator input signal voltage Microphone amplifier Load current Ambient temperature range Test Conditions / Pins Pin 4 Pin3 Pin 9 Pin 12 Pin 10 Pins 6 and 18 Symbol VS Min. 3.5 0 - 0.3 VB 0 0 0 0 Tamb -20 Typ. - - - - - - - - - Max. 6.5 VS 500 VB 350 Unit V V
IB VCI
mA
V mVrms dB mA C
@ RECO, TO Pins 5, 19 @ MICO Pin 7
"2.0 "1.0
+60
40
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
Electrical Characteristics
Tamb = +25C, VS = 5.0 V, CD Parameters Power supply Supply current CD input resistance CD input voltage Output voltage Output resistance Power supply rejection ratio Attenuators Receive attenuator gain
v 0.8 V, unless otherwise specified
Test Conditions / Pins Symbol IS RCD VCDH VCDL VB ROVB PSRR 50.0 2.0 0.0 1.8 Min. Typ. 4.0 600.0 90.0 Max. 6.0 800.0 VS 0.8 1.3 2.1 400.0 54.0 2.4 Unit mA
VS = 6.5 V, CD = 0.8 V VS = 6.5 V, CD = 2.0 V VS = VCD = 6.5 V - High - Low VS = 3.5 V VS = 5.0 V IVB = 1.0 mA CVB = 220 mF, f = 1.0 kHz
mA
kW V V
W
dB
Gain change AGC gain change Idle mode Range R to T mode Volume control range RECO DC voltage RECO DC voltage RECO high voltage RECO low voltage
f = 1.0 kHz, VCI = VB R mode, RI = 150 mVrms (VS = 5.0 V) R mode, RI = 150 mVrms (VS = 3.5 V) VS = 3.5 V vs. VS = 5.0 V -VS = 2.8 V vs. VS = 5.0 V RI = 150 mVrms R mode, 0.3 VB < VCI < VB R mode R to T mode IO = 1.0 mA RI = VB + 1.5 V IO = 1.0 mA RI = VB -1.0 V, output measured w.r.t. VB RI < 350 mVrms f = 1.0 kHz T mode, TI = 150 mVrms Idle mode, TI = 150 mVrms Range T to R mode T mode T to R mode IO = -1.0 mA TI = VB + 1.5 V IO = +1.0 mA TI = VB - 1.0 V, output measured w.r.t. VB TI < 350 mVrms GR + GT, @ T, Idle, R
dB GR 4.0 6.0 8.0
DGR1 DGR2 DGR3 DVRECO
VRECOH VRECOL VCR VRECO GRI
-0.5 -22.0 49.0 27.0
0.0 -25.0 -20.0 52.0 35.0 VB
+0.5 -15.0 -17.0 54.0
dB dB V mV V
"10 "150.0
-1.5 -1.0
3.7
V
RI input resistance Transmit attenuator gain
RRI GT GTI GTI VTO VTO VTOH VTOL
7.0 4.0 -22.0 49.0
10.0 6.0 -20.0 52.0 VB
14.0 8.0 -17.0 54.0
kW
dB V mV V V
TO DC voltage TO DC voltage TO high voltage TO low voltage
"100 "150.0
3.7 -1.5 -1.0
TI input resistance Gain tracking
RTI GTR
7.0
"0.5
10.0
14.0
kW dB
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Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
Parameters Attenuator control CT voltage Test Conditions / Pins Pin 14 - VB R mode, VCI = VB Idle mode T mode R mode T mode Symbol VCT 240.0 0.0 -240.0 -60.0 60.0 0.0 2.0 -60.0 15.0 mV -40.0 85.0 3.6 Min. Typ. Max. Unit
CT source current CT sink current CT slow idle current CT fast idle internal resistance VCI input current Dial tone detector threshold Microphone amplifier VMUTE < 0.8 V, GVCL = 31 dB Output offset VMICO - VB, Feedback R = 180 kW Open loop gain f < 100 Hz Gain bandwidth Output high voltage IO = -1.0 mA, VS = 5.0 V Output low voltage IO = +1.0 mA Input bias current (MIC) Muting (D gain) f = 1.0 kHz, VMUTE = 2.0 V 300 Hz < f < 10 kHz MUTE input resistance VS = VMUTE = 6.5 V MUTE input high MUTE input low Distortion 300 Hz < f < 10 kHz Level detectors and background-noise monitors Transmit receive switching Ratio of current threshold at RLI1 + RLI2 to 20 mA at TLI1 + TLI2 to switch from T to R Source current at RLO1, RLO2, TLO1, TLO2 Sink current at RLO1, RLO2, TLO1, TLO2 CPR, CPT output IO = 1.2 mA resistance CPR, CPT leakage current System distortion R mode From RI to RECO T mode From MIC to TO includes T attenuator
ICTR ICTT ICTS RFI IVCI VDT
-85.0 40.0 1.5
mA mA mA
kW nA mV
10.0
20.0
MICOvos GVOLM GBWM VMICOH VMICOL IBM G G RMUTE VMUTEH VMUTEL THDM ITH
-50.0 70.0 3.7
0.0 80.0 1.0
+50.0
mV dB MHz V mV nA dB dB kW V V %
200.0 -40.0 -55.0 50.0 2.0 0.0 -68.0 90.0 VS 0.8 0.15 0.8 1.0 1.2
ILSO ILSK RCP ICPLK dR dT
-2.0 4.0 150 -0.2 0.5 0.8 3.0 3.0
mA
mA W mA
% %
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
Temperature Characteristics
Parameter Supply current, CD = 0.8 V Supply current, CD = 2.0 V VB output voltage, VS = 5.0 V Attenuator gain (max. gain) Attenuator gain (max. attenuation) Attenuator input resistance (@ TI, RI) Dial-tone detector threshold CT source, sink current Microphone, hybrid offset Transmit receive switching threshold Sink current at RLO1, RLO2, TLO1, TLO2 IS IS VO Typical Value @ 25C 4.0 mA 400.0 mA 2.1 V +6.0 dB -46.0 dB 10.0 kW 15.0 mV 0.0 mV 4.0 mA 1.0 Typical Change -20 to +60C -0.3%/C -0.4%/C +0.8%/C 0.0008 dB/C 0.004 dB/C +20.0 mV/C +0.6%/C
"60.0 mA
*0.15%/C "4.0 mV/C "0.02%/C *10.0 nA/C
8 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
Introduction
General
The fundamental difference between the operation of a speakerphone and a handset is that of half-duplex versus full-duplex. The handset is full-duplex since conversation can occur in both directions (transmit and receive) simultaneously. A speakerphone has higher gain levels in both paths, and attempting to converse full-duplex results in oscillatory problems due to the loop that exists within the system. The loop is formed by the receive and transmit paths, the hybrid and the acoustic coupling (speaker to microphone). Today, the only practical and economical solution is to design the speakerphone in half-duplex mode, i.e., only one person speaks at a time, while the other listens. To achieve this, a circuit able to detect who is talking, to switch-on the appropriate path (transmit or receive) and to switchoff (attenuate) the other path is necessary. In this way, the loop gain is maintained less than unity. The circuit has to detect quickly a change from one speaker to the other and to switch the circuit accordingly. Due to its speech-level detectors, the circuit operates in a "hands-free" mode, eliminating the need for a "push-to-talk" switch. The handset has the same loop as the speakerphone. Oscillations do not occur because the gains are considerably lower, and there is almost no coupling from the earpiece to the mouthpiece (the receiver is normally held at a person's ear). The U4084B provides the level detectors, attenuators, and switching control necessary for proper operation of the speakerphone. The detection sensitivity and timing are externally controllable. Additionally, the U4084B provides background-noise monitors which make the circuit insensitive to room and line noise, hybrid amplifiers for interfacing to tip and ring, the microphone amplifier, and other associated functions.
Transmit and Receive Attenuators TI, TO and RI, RECO
The attenuators are operating complementary, i.e., when one is at maximum gain (+6.0 dB), the other is at maximum attenuation (-46 dB), and vice versa, i.e., both are never completely on or off. The sum of their gains remains constant (within a nominal error band of dB) at a typical value of -40 dB (see figure 8). The attenuators control the transmit and receive paths to provide the halfduplex operation required in a speakerphone. The attenuators are non-inverting, and have a -3.0 dB (from max. gain) frequency of approximately 100 kHz. The input impedance of each attenuator (TI and RI) is nominally 10 kW (see figure 3). To prevent distortion the input signal should be limited to 350 mVrms. The maximum recommended input signal is independent from the volume control setting. The diode clamp on the inputs limits the input swing, and therefore the maximum negative output swing. The output impedance is less than 10 W until the output current limit (typically 2.5 mA) is reached. 12627 VB 11 k
"0.5
RI 18 TI 6
5 k
95 k
CT 11
Figure 3. Attenuator input stage
The attenuators are controlled by the signal output of the control block which is measurable at the CT pin (Pin 11). When the CT pin is at +240 mV w.r.t. VB, the circuit is in receive mode (the receive attenuator is at 6.0 dB). When the CT pin is at -240 mV w.r.t. VB, the circuit is in transmit mode (the transmit attenuator is at 6.0 dB). The circuit is in idle mode when the CT voltage is equal to VB causing the attenuators' gain to be half-way between their fully-on and fully-off position (-20 dB each). Monitoring the CT voltage (w.r.t. VB) is the most direct method of monitoring the circuit's mode. The attenuator control has seven inputs: two from the comparators operated by the level detectors, two from the background noise monitors, volume control, dial-tone detector, and AGC. They are described as follows:
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
Level Detectors, Figure 4
There are four level detectors, two on the receive side and two on the transmit side. As shown in figure 4, the terms in parentheses form one system, and the other terms form the second system. Each level detector is a high-gain amplifier with back-to-back diodes in the feedback path, resulting in a non-linear gain which permits operation over a wide dynamic range of speech levels. Refer to figures 9, 10 and 11 for their AC and DC transfer characteristics. The sensitivity of each level detector is determined by the external resistor and capacitor at each input (TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and limiting resistor, thus providing a DC representation of the input AC signal level. The outputs have a quick rise time (determined by the capacitor and an internal 350-W resistor), and a slow decay time set by an internal current source and the capacitor. The capacitors on the four outputs should have the same value ("10%) to prevent timing problems. On the receive side, one level detector (RLI1) is at the receive input receiving the same signal as at tip and ring, and the other (RLI2) is at the output of the speaker amplifier (see figure 2). On the transmit side, one level detector (TLI2) is at the output of the microphone amplifier while the other (TLI1) is at the hybrid output. Outputs RLO1 and TLO1 feed a comparator. The output of this compaLevel detector
rator goes to the attenuator control block. Likewise, outputs RLO2 and TLO2 feed a second comparator which also goes to the attenuator control block. The truth table for the effects of the level detectors is given in the section "Attenuator Control Block.
Background-Noise Monitors
The background-noise monitiors distinguish speech (which consists of bursts) from background noise (a relatively constant signal level). There are two background-noise monitors - one for the receive path and the other for the transmit path. Referring to figure 4, the receive background-noise monitor is operated by the TLI2-TLO2 level detector. Background-noise monitoring is carried out by storing a DC voltage representative of the respective noise levels in capacitors at CPR and CPT. The voltages at these pins have slow rise times (determined by the external RC), but fast decay times. If the signal at RLI1 (or TLI2) changes slowly, the voltage at CPR (or CPT) will remain being more positive than the voltage at the non-inverting input of the monitor's output comparator. When speech is present, the voltage on the non-inverting input of the comparator will rise quicker than the voltage at the inverting input (due to the burst characteristic of speech), causing its output to change. This output is sensed by the attenuator control block".
Background-noise monitor 24 VS 100k CPR (CPT) 47F
23 RLI1 (TLI2) 5.1k 0.1F Signal input Level detector VB 20 TLI1 (17) (RLI2) 5.1k 2F 0.1F Signal input + - 4A (14) VB - + 350
4A - + - 56k 33k 12 VB + - +
(13)
22 (15) RLO1 (TLO2) 2F
36 mV
C4 (C3) - + C2 (C1)
350 21 (16) TLO1 (RLO2)
Comparator
to attenuator control block
12673
Figure 4. Level detectors
10 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
The 36-mV offset at the comparator's input keeps the comparator from changing state unless the speech level exceeds the background noise by approximately 4.0 dB. The time constant of the external RC (approximately 4.5 s) determines the response time to background-noise variations. RI 18 C4 to attenuator control to R attenuator
Volume Control
The volume control input at VCI (Pin 10) is sensed as a voltage w.r.t. VB. It affects the attenuators only in receive mode and has no effect in the idle or transmit modes. In receive mode, the receive attenuator gain, GR, is 6.0 dB, and the transmit attenuator gain, GT, is -46 dB under the condition that VCI = VB. When VCI < VB, the receive attenuator gain is reduced (figure 10), whereas the transmit attenuator gain is increased. Their sum, however, remains constant. A voltage deviation at VCI changes the voltage at CT, which in turn controls the attenuators (see "Attenuator Control Block"). The volume control setting does not affect the maximum attenuator input signal at which noticeable distortion occurs. The bias current at VCI is typically -60 nA. It does not vary significantly with the VCI voltage or supply voltage VS.
VB
Figure 5. Dial-tone detector
12674
AGC
The AGC circuit affects the circuit only in receive mode, and only when the supply voltage is less than 3.5 V. As VS < 3.5 V, the gain of the receive attenuator is reduced (see figure 13). The transmit path attenuation changes such that the sum of the transmit and receive gains remains constant. The purpose of this feature is to reduce the power (and the current) used by the speaker when a line-powered speakerphone is connected to a long line where the available power is limited. By reducing the speaker power, the voltage sag at VS is controlled, preventing possible erratic operation.
Attenuator Control Block
The attenuator control block has seven inputs:
Dial-Tone Detector
The dial-tone detector is a comparator with one side connected to the receive input (RI) and the other to VB with a 15-mV offset (see figure 5). If the circuit is in idle mode, and the incoming signal is greater than 15 mV (10 mVrms), the comparator's output will change, disabling the receive idle mode. The receive attenuator will then be at a setting determined mainly by the volume control. This circuit prevents the dial tone (which would be considered as continuous noise) from fading away as the circuit would have the tendency to switch to the idle mode. By disabling receive idle mode, the dial tone remains at the normally expected full level.
D The output of the comparator operated by RLO2 and
TLO2 (microphone/speaker side) - designated C1
D The output of the comparator operated by RLO1 and
TLO1 (Tip/Ring side) - designated C2
D The output of the transmit background-noise monitor
- designated C3
D The output of the receive background-noise monitor
- designated C4
D The volume control D The dial-tone detector D The AGC circuit
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
The single output of the control block controls the two attenuators. The effect of C1-C4 is as follows: Inputs C1 T T R R T T R R C2 T R T R T R T R C3 1 Y Y X 0 0 0 X C4 X Y Y 1 X 0 0 0 Output Mode Transmit Fast idle Fast idle Receive Slow idle Slow idle Slow idle Slow idle b) the transmit background-noise monitor indicates the presence of speech 2. The circuit will switch to receive mode if: a) both receive level detectors sense higher signal levels relative to the respective transmit level detectors, and b) the receive background-noise monitor indicates the presence of speech 3. The circuit will switch to fast idle mode if the level detectors disagree on the relative strengths of the signal levels, and at least one of the backgroundnoise monitors indicates speech. If, e.g., there is a signal at the microphone amp output (TLI2) to override the speaker signal (RLI2) and there is sufficient signal at the receive input (RLI1) to override the signal at the hybrid output (TLI1), and either one or both background monitors indicate speech, then the circuit switches to fast idle mode. Undesired switching to idle mode may occur if one of the following conditions is met: a) when both persons speaking try to talk at the same time, and b) when one of the persons speaking is in a very noisy environment, forcing the other one to continually override that noise level. In general, fast idle mode occurs rarely. 4. The circuit will switch to slow idle mode when a) both persons at the phone are quiet (no speech present), or b) when the speech levelof one of the persons talking is continuously overriden by noise at the other speaker's location. The time required to switch the circuit between transmit, receive, fast idle and slow idle mode is deter-mined in part by the components at Pin 11, (see the section "Switching Times" for a more detailed explanation). A schematic of the CT circuitry is shown in figure 6.
X = don't care; Y = C3 and C4 are not both 0.
Terms Definition
11. "Transmit" means the transmit attenuator is fully on (+ 6.0 dB), and the receive attenuator is at max. attenuation (- 46 dB). 12. "Receive" means both attenuators are controlled by the volume control. At max. volume, the receive attenuator is fully on (+ 6.0 dB), and the transmit attenuator is at max. attenuation (- 46 dB). 13. "Fast Idle" means both transmit and receive speech are present in approximately equal levels. The attenuators are quickly switched (30 ms) to idle until one speech level dominates the other. 14. "Slow Idle" means speech has ceased in both transmit and receive paths. The attenuators are then slowly switched (1 s) to idle mode. 15. Switching to the full transmit of receive modes from any other mode is at the fast rate ([ 30 ms).
Summary
1. The circuit will switch to transmit mode if: a) both transmit level detectors sense higher signal levels relative to the respective receive level detectors (TLI1 versus RLI1, TLI2 versus RLI2), and
12 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
VB 12 - RT 11 CT I1 CT I2 60A Attenuator control 4 C1 ... C4 2k + to attenuators
Volume control Dial-tone detector AGC
12675
Figure 6. CT attenuator control block circuit
Operation of the CT Circuitry
- -
Microphone Amplifier, Pins 7, 8 and 9
The non-inverting input of the microphone amplifier (Pins 7 and 8) is connected to VB, while the inverting input and the output are pinned out. Unlike most op amps, the amplifier has an all NPN output stage which maximizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as well with a wide range of reactive loads. The open loop gain is typically 80 dB (f < 100 Hz), and the gain-bandwidth is typ. 1.0 MHz (see figure 4). The maximum p-p output swing is typ. (VS - 1 V) with an output impedance of < 10 W until current limiting is reached (typ. 1.5 mA). The input bias current at MIC is typically - 40 nA.
RT is typ. 120 kW and CT is typ. 5.0 mF.
To switch to receive mode, I1 is turned on (I2 is off), charging the external capacitor to + 240 mV above VB. (An internal clamp prevents further charging of the capacitor). To switch to transmit mode, I2 is turned on (I1 is off) bringing down the voltage on the capacitor to - 240 mV with respect to VB. To switch to idle mode quickly (fast idle), the current sources are turned off, and the internal 2.0-kW resistor is switched on, discharging the capacitor to VB with a time constant = 2.0 kW CT. To switch to idle slowly (slow idle), the current sources are turned off, the switch at the 2.0-kW resistor is open, and the capacitor discharges to VB with a time constant = RT CT.
-
-
-
R R from Mike
MF 8 MIC V 9 MUTE 75k S 90k V+ B-
V
S 7 MICO
MI
12676
Figure 7. Microphone amplifier and mute
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
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Preliminary Information
U4084B
When activated, the muting function (Pin 9) reduces the gain of the amplifier to approximately - 39 dB (with RMI = 5.1 kW) by shorting the output to the inverting input (see figure 7). The mute input has a threshold of approximately 1.5 V, and the voltage at this pin must be kept within the range of ground and VS (see figure 15). If the mute function is not used, the pin should be grounded.
10 0 - 10 G (dB) - 20 - 30 - 40 - 50 - 320
93 7767 e
T attenuator
R attenuator
Power Supply, VB, and Chip Disable
The power supply voltage at Pin 4 (VS) is between 3.5 and 6.5 V for normal operation. Reduced operation at 2.8 V is, however, also possible (see figure 13 and the AGC section). The power supply current is shown in figure 16 for both operations, power-up and power-down mode. The output voltage at VB (Pin 12) is approximately (VS-0.7)/2. and provides the AC ground for the system. The output impedance at VB is approximately 400 W (see figure 17), and forms together with the external capacia low-pass filter for power supply rejection. tor at VB Figure 18 indicates the amount of rejection for different capacitors. The capacitor values depend on whether the circuit is powered by the telephone line or a power supply.
- 160
0 160 VCT - VB (mV)
320
Figure 8. Attenuator gain versus VCT (Pin 11)
500
*
*
400
Since VB biases the microphone amplifier, the amount of supply rejection at its output is directly related to the rejection at VB, as well as its gain. Figure 19 depicts this graphically. The chip disable (Pin 3) permits powering down the IC to conserve power and/or for muting purposes. With CD < 0.8 V, normal operation is in effect. With CD > 2.0 V and < VS, the IC is powered down. In the power-down mode, the microphone amplifier is disabled, and its output goes to a high impedance state. Additionally, the bias is removed from the level detectors. The bias is not removed from the attenuators (Pins 5, 6, 18 and 19), or from Pins 10, 11 and 12 (the attenuators are disabled, however, and will not pass a signal). The input impedance at CD is typically 90 kW and has a threshold of approximately 1.5 V. The voltage at this pin must be kept within the range of ground and VS (see figure 15). If CD is not used, the pin should be grounded.
DVO (mV)
300
200
100
0 0
93 7768 e
- 20
- 40 - 60 II (mA)
- 80
- 100
Figure 9. Level-detector DC transfer characteristics
300 250 200 R = 5.1 kW C = 0.1 mF R = 10 kW C = 0.047 mF or 0.1 mF f = 1 kHz
DVO(mV)
150 100 50 0
0
20
4
60
80
100
93 7769 e
Vi (mVrms)
Figure 10. Level-detector AC transfer characteristics
14 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
20 10 10
0 vi = 10 mV
DVO (mV @ 1 kHz)
0 - 10 - 20 - 30 - 40
DG (dB)
- 10
vi = 40 mV
- 20
- 30
100
93 7770 e
1000 f (Hz)
10000
- 40 2.8
93 7772 e
3
3.2 VS (V)
3.4
3.6
Figure 11. Level-detector AC transfer characteristics versus frequency
10
Figure 13. Receive attenuation gain versus VS
120 0 GVOL( dB ) - 10 100 80 60 40 - 30 Minimum recommended level - 40 0.1
93 7771 e
120 100 Phase ( degrees ) 80 60 40 Gain 20 0 0 1 10 f ( kHz ) 100 1000
DG (dB)
- 20
Receive mode
20 0 0.3 0.5 0.7 0.9 1.2
94 7871 e
VCI/VB
Figure 12. Receive attenuator versus volume control
Figure 14. Microphone amplifier open loop gain and phase versus frequency
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
15 (26)
Preliminary Information
U4084B
120 100 80 60 40 20 0 0
93 7774 e
3.0
Valid for 0
v CD, MUTE v VS
V (V) B
2.5 2.0 1.5 1.0 0.5 0 0
93 7776 e
VS = 6 V
II
(mA)
VS = 3.5 V
2
4 Input Voltage (V)
6 6.5
8
0.5
1.0 1.5 2.0 - IB (mA) (Load Current)
2.5
Figure 15. Input characteristics @ CD, MUTE
6 80
Figure 17. VB output characteristics
CVB = 1000 mF 500 mF CDv0.8 V PSRR (dB) 4 I S ( mA ) 60 200 mF 100 mF 50 mF 40 2 VvCDvVS 0 0
94 7880 e
2
2
4 VS ( V )
6
8
93 7778 e
20 0.3 1 f (kHz) 2 3
Figure 16. Supply current versus supply voltage
Figure 18. VB power-supply rejection versus frequency characteristics and VB capacitor
16 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
Design Hints Switching Time, Figure 6
The switching time of the U4084B circuit is determined by CT (Pin 11, refer to figure 6), and the capacitors at the level-detector outputs (RLO1, RLO2, TLO1, TLO2), see figure 2. The switching time from idle to receive or transmit mode is determined by the capacitor at CT, together with the internal current sources. The switching time is: of the level detectors' outputs to new speech is quick by comparison (approximately 1.0 ms), determined by the internal 350 W resistor and the external capacitor (typically 2.0 mF). The output's decay time is determined by the external capacitor, and an internal 4.0-mA current source giving a decay rate of 60 ms for a 120 mV excursion at RLO or TLO. The total response time of the circuit is not constant as it depends on the relative strength of the signals at the different level detectors and the timing of the signals with respect to each other. The capacitors at the four outputs (RLO1, RLO2, TLO1, TLO2) must have equal values ("10%) to prevent problems in timing and level response. The rise time of the level detector's outputs is too short to be of significant. The decay time, however provides a significant part of the "hold time" necessary to hold the circuit during the normal pauses in speech. The components at the inputs of the level detectors (RLI1, RLI2, TLI1, TLI2) do not affect the switching time but rather affect the relative signal levels required to switch the circuit and the frequency response of the detectors.
DT
+ DV I C + 24060 5 + 20.0 ms
T
where:
DV
CT I
= = =
240 mV 5 mF 60 mA
If the circuit switches directly from receive to transmit mode (or vice-versa), the total switching time is 40 ms. The switching time depends on the mode selection. If the circuit is switching to "fast idle", the time constant is determined by the CT capacitor, and the internal 2.0-kW resistor. With CT = 5.0 mF, the time constant is approximately 10 ms, resulting in a switching time of approximately 30 ms (for 95% change). Fast idle is mode may occur if both persons are talking at the same time, thus trying to get control of the circuit. The switching time from idle back to either transmit or receive mode is described above. By switching to "slow idle", the time constant is determined by the CT capacitor and RT, the external resistor (see figure 6). With CT = 5.0 mF, and RT = 120 kW, the time constant is approximately 600 ms, resulting a switching time of approximately 1.8 seconds (for 95% change). The switching to slow idle starts when both speakers have stopped talking. The switching time back to the original mode depends on how fast that person starts talking again. The sooner the speaking starts during the 1.8-second period, the faster the switching time since a smaller voltage excursion is required. The switching time is determined by the internal current source as described above. The above switching times occur after the level detectors have detected the appropriate signal levels, since their outputs operate the attenuator control block. The rise time
Design Equations
Following definitions are used @ 1.0 kHz with reference to figures 2 and 21 whereas coupling capacitors are omitted for the sake of simplicity: - GMA is the gain of the microphone amplifier measured from the microphone output to TI (typically 35 V/V, or 31 dB); GT is the gain of the transmit attenuator, measured from TI to TO; GEXT is the gain of an external transmit amplifier (typically 10.2 V/V, or 20.1 dB) GST is the side-tone gain; GEXR is the gain of an external receive amplifier; GR is the gain of the receive attenuator measured from RI to RECO; GSA is the gain of the speaker amplifier, measured from RECO to the differential output of the speaker amplifier (typically 22 V/V or 26.8 dB); GAC is the acoustic coupling, measured from the speaker differential voltage to the microphone output voltage.
- - - - - -
-
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
17 (26)
Preliminary Information
U4084B
6 60 MICO, CVB = 1000 mF 40 5 4 VOPP ( V ) 3 TO 2 1 RO 0 0
94 7870 e
MICO
PSRR ( dB )
TO,RO
= 220 mF 20
0 1 f ( kHz ) 10
94 7872 e
3
4
5 VS ( V )
6
Figure 19. Power supply rejection of the microphone amplifier
Figure 20. Typical output swing versus VS
MIC amp. MICO I1 R1 TI T attenuator TO
ext. Transmit. amp.
12677
R2
I2
- + Acoustic coupling + - RLI2 Comparator C1 Attenuator control Comparator C2
- +
TLI1 Tip GST Hybrid Ring RLI1
+ -
I3
R3 R attenuator SAO Speaker amp. RECO RI
R4
I4
ext. Receive amp.
Figure 21. Basic block diagram for design purposes
18 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
I) Loop Gain
I2 The total loop gain (of figure 21) must add up to a value < 0 dB to obtain a stable circuit. This can be expressed as:
GMA + GT + GEXT + GST + GEXR + GR + GSA + GAC < 0
+V R
M 2
G MA
GT
G EXT 2
......7
......1 Using the typical numbers mentioned above, and using the equation GT + GR = -40dB, the required acoustic coupling can be determined: GAC <-[31 + 20.1 + (-15) + 0 + (-40) + 26.8] + -22.9 ......2 An acoustic loss of at least 23 dB is necessary to prevent instability and oscillations, commonly referred to as "singing". However, the following equations show that greater values of acoustic loss are necessary to obtain proper level detection and switching.
Since GEXT is the differential gain of the external transmit amplifiers, it is divided by two to obtain the voltage V2 applied to R2. Comparator C2 switches when I4 = I2. I4 is defined by: I4
+V R
L 4
[G EXR ]
......8
Setting I4 = I2, and combining the above equations results in: VL
+V
M
R4 R2
[G MA
GT G EXR
G EXT] 2
...9
II) Switching Thresholds
To switch comparator C1, the currents I1 and I3 have to be determined. When a receive signal VL is applied to Tip/Ring, a current I3 flows through R3 into RLI2 (see figure 21) according to the following equation: I3
This equation defines the line voltage at Tip/Ring necessary to switch comparator C2 in the presence of a microphone voltage. The highest VL occurs when the circuit is in transmit mode (GT = + 6.0 dB). Using the typical values for equation 9 yields: VL = 840 VM (or VM = 0.0019 VL) . . . . . . 10 At idle mode, where the gain of the two attenuators is -20 dB (0.1 V/V), equations 6 and 10 yield the same result: VM = 0.024 VL . . . . . . 11 Equations 6, 10, and 11 define the thresholds for switching, and are represented in figure 22. The "M" terms are the slopes of the lines (0.52, 0.024, and 0.0019) which are the coefficients of the three equations. The MR line represents the receive to transmit threshold in that it defines the microphone signal level necessary to switch to transmit in the presence of a given receive signal level. The MT line represents the transmit to receive threshold. The MI line represents the idle condition, and defines the threshold level on one side (transmit or receive) necessary to overcome noise on the other. MR
+V R
L 3
G EXR
GR
G SA ......3 2
where the terms in the brackets are in V/V gain terms. The speaker amplifier gain is divided by two since GSA is the differential gain of the amplifier, and V3 is obtained from one side of that output. The current I1, coming from the microphone circuit, is defined by: I1
+V
M
G MA R
1
......4
where VM is the microphone voltage. Since the switching threshold occurs when I1 = I3, combining the above two equations yields: VM
+V
L
R1 R3
[G EXR
GR G MA 2
G SA]
...5
VM MI
This is the general equation defining the microphone voltage necessary to switch comparator C1 when a receive signal VL is present. The highest VM occurs when the receive attenuator is at maximum gain (+ 6.0 dB). Using the typical values of equation 5 results in: VM = 0.52 VL ......6
MT
To switch comparator C2, the currents I2 and I4 need to be determined. When sound is applied to the microphone, a voltage VM is created by the microphone, resulting in a current I2 into TLI1: TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
12678
VL
Figure 22. Switching thresholds
19 (26)
Preliminary Information
U4084B
Some comments on the graph (figure 22):
D Acousting coupling and side-tone coupling were not
included in equations 6 and 11. Those couplings will affect the actual performance of the final speakerphone due to their interaction with speech at the microphone, and the receive signal coming in at Tip/ Ring. The effects of those couplings are difficult to predict due to their associated phase shifts and frequency response. In some cases, the coupling signal will add, and other times substract from the incoming signal. The physical design of the speakerphone enclosure, as well as the specific phone line to which it is connected, will affect the acoustic and side-tone couplings, respectively.
threshold can be reduced by connecting a resistor from RI to ground. The resistor value is calculated from: R
+ 10 k
where VB is the voltage at Pin 12, and DV the amount of threshold reduction. By connecting a resistor from VS to RI, the threshold can be increased. The resistor value is calculated from: R
DV -
VB
1
+ 10 k
V S-V B
where DV is the amount of the threshold increase.
DV
-1
Background-Noise Monitors
For testing or circuit analysis purposes, the transmit or receive attenuators can be set to the "on" position by disabling the background noise monitors, and applying a signal so as activate the level detectors. Grounding the CPR pin will disable the receive background-noise monitor, thereby indicating the "presence of speech" to the attenuator control block. Grounding CPT does the same for the transmit part. Additionally, the receive background-noise monitor is automatically disabled by the dial-tone detector whenever the receive signal exceeds the detector's threshold.
D The MR line helps define the maximum acoustic
coupling permissible in a system, which can be found from the following equation: R1 . . . . . 12 G AC(MAX( 2 R 3 G MA Equation 12 is independent of the volume control setting. Conversely, the acoustic coupling of a designed system helps determine the minimum slope of that line. Using the component values of figure 2 in equation 12 yields a GAC(MAX) of -37 dB. Experience has shown, however, that an acoustic coupling loss of >40 dB is desirable.
+
D The MT line helps define the maximum sidetone coupling (GST) permissible in the system, which can be found from the following equation: R1 . . . . . 13 G ST 2 R2 Using the component values of figure 2 in equation 13 yields a maximum side-tone of 0 dB. Experience has shown, however, that a minimum of 6.0-dB loss is preferable.
Transmit/Receive Detection Priority
Although the U4084B was designed to have an idle mode such that the attenuators are halfway between their full-on and full-off positions, the idle mode can be biased towards the transmit or the receive side. By doing so, gaining control of the circuit from idle will be easier for that side towards which it is biased since that path will have less attenuation at idle. By connecting a resistor from CT (Pin 11) to ground, the circuit will be biased towards the transmit side. The resistor value is calculated from: R
+
The above equations can be used to determine the resistor values for the level detector inputs. Equation 5 can be used to determine the R1, 3 ratio and equation 9 can be used to determine the R1-R2 ratio. In figure 21, R1-R4 each represent the combined impedance of the resistor and coupling capacitor at each level detector input. The magnitude of each RC's impedance should be kept within the range of 2.0 to 15 kW in the voiceband (due to the typical signal levels present) to obtain the best performance from the level detectors. The specific R and C at each location will determine the frequency response of that level detector.
+R
T
D
VB -1 V
where:
DV = VB - V11 (see figure 8).
RT = 120 kW (typ.) connected between Pin 11 and 12.
By connecting a resistor from CT (Pin 11) to VS, the circuit will be biased towards the receive side. The resistor value is calculated from: R
Application Information
Dial-Tone Detector
The threshold for the dial-tone detector is internally set at 15 mV (10 mVrms) below VB (see figure 5). That
+R
T
VS - VB DV -1
The switching time will be somewhat affected in each case due to the different voltage excursions required to get to transmit and receive from idle. For practical considerations, the DV shift should not exceed 100 mV.
20 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
Applications
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
2.2 m F 100kW 10kW 5.1kW 2m F 21 20 19 18 17 16 15 14 0.1 m F 0.1 m F 2m F 2m F 47 m F 5.1kW 5.1kW 2mF 23 22 100kW 430W 47 m F 8.2kW 16 15 14 13 12 11 24 0.05 m F 0.1 m F 0.05 m F 0.1m F 13 8 7 6 5
1000 m F
VZ= 15V
1kW
10W
68W
68nF 10m F
20
19
18
17
a
U4030B
470n F 12kW 5 7 8 9 10 1 4 7 2 3 6 5 6 8 9
U4084B
10 11 12 220mF 0.1 m F 120kW 620 W 5 mF 220pF 180kW 20 m F 1
U4083B
2 3 4
b
1
2
3
4
DTMF 10 m F 2kW
470nF
10 m F
470nF
68nF
110kW
10kW
33kW
12kW 2.2 m F 680W 1kW
W 20k
1kW 9.1kW
Preliminary Information
100nF 5.1kW 18kW 390W 53nF 2.7k W 0.2 m F 0.02 m F
10 m F
100nF
12679
U4084B
21 (26)
U4084B
22 (26)
0.1 m F 5.1kW 2 mF 21 7 20 19 18 17 16 15 14 13 8 6 0.1 m F 0.1 m F 2m F 2m F 47 m F 5.1kW 5.1kW 100kW 0.05 m F 0.1 m F 5
100kW
0.05 m F
47 m F
10kW
2mF
24
23
22
U4084B
U4083B
110kW
1 4 220 mF 0.1 m F 120kW 5mF 180kW 620W 20 m F 7 8 9 10 11 12
2
3
5
6
1
2
3
4
10kW
Preliminary Information
220pF 1kW 5.1k W 0.2mF 0.02 m F
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
12680
SW3 VZ=30V 2 3 RD 4 Keyboard RCK X1 Pulse * R 8 6 9 1 # 5 7 0
DSC RRP CRP TSC 455kHz
LSC
Micro controller
CAD
SW2 RIN
CSC
Line interface 6 39 5 4 3 2 1 44 43 42 41 40
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
38 0.05 m F 0.1 m F 0.05 mF 0.1 m F 37 RSTS2 36 15 m F RSTS3 CSTS2 34 24 CSTS3 33 CREC RSTL2 32 23 22 21 20 19 18 17 16 15 14 13 2 mF 2mF 0.1 m F 0.1 mF 36k 300k W 300k W 5.1k W 6.2k W 5.1k W
RAD
CAL
7
RAL
L1
L2
8
CVDD
9
10
W
VZ= 15V 35
RSAI
15 mF 2m F 2 mF
11
CSAI
12
U3800BM
CVSA
13
14
CSO 31 RSTL3 CSTL2 EAR CSTL3 29 CEAR 18 CACL CZA C1 CEM1 RACL MIC RSTL1 RSTS1 0.1 m F 120k W 620 W 19 20 21 22 23 24 25 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12
15
U4084B
16 30
Preliminary Information
RZAC RDTMF2 CZA C2 RDC CTO CEM2 CDTMF2 CDTMF1 CSTL1 CSTL1 0.1 m F RDTMF1 RTO 1.5M W
17
SW1
RAGA1
CVCC
RV
RAGA2
CEI
5m F 220pF 180k W 220 20 m F
mF
1k W 0.2 5.1k W 0.02 mF 12681
U4084B
mF
23 (26)
U4084B
0.05 F 36k 15F 2F 24 23 22 2F 21 20 0.1F 19 0.1F 18 17 2F 16 2F 15 14 13 5.1k 0.1F 0.05 F 6.2k 0.1F 5.1k 15F
300k
300k
U4084B
1 2 3 4 5 6 7 8 9 10 11 12
220F
0.1F
120k 620
0.1F
220pF
5F 180k 20F
1.5M
5.1k
0.2F
1k
0.02 F
12682
24 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
U4084B
Package Information
Package DIP24 (CEI)
Dimensions in mm
32.26 31.24 15.49 14.99
4.06 3.56 0.89 0.38 3.81 3.18 1.65 1.02 27.94 24 13 0.58 0.38 0.38 0.20 2.54 13.97 12.70 17.02 15.24
technical drawings according to DIN specifications 13041
1
12 9.15 8.65 7.5 7.3
Package SO24
Dimensions in mm
15.55 15.30
2.35 0.4 1.27 24 13.97 13 0.25 0.10 0.25 10.50 10.20
technical drawings according to DIN specifications 13037
1
12
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97
25 (26)
Preliminary Information
U4084B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
26 (26)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 31-Jan-97


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